mirror of https://github.com/bitcoin/bitcoin
commit
2ce0e50af3
@ -0,0 +1,14 @@
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#!/bin/bash
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echo "Benchmark Results" >output.txt
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for j in no-yasm yasm; do
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echo "5x64 $j:" >>output.txt
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for i in O0 O1 O2 O3; do
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make clean
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./configure --$j
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echo "OPTLEVEL=$i" >>config.mk
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make bench
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echo "OPTLEVEL=$i" >>output.txt
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(time ./bench) |& grep real >>output.txt
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done
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done
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@ -0,0 +1,333 @@
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;; Added by Diederik Huys, March 2013
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;;
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;; Provided public procedures:
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;; secp256k1_fe_mul_inner
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;; secp256k1_fe_sqr_inner
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;;
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;; Needed tools: YASM (http://yasm.tortall.net)
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;;
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;;
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BITS 64
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COMP_LIMB EQU 000000001000003D1h
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;; Procedure ExSetMult
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;; Register Layout:
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;; INPUT: rdi = a->n
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;; rsi = b->n
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;; rdx = r->a
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;;
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;; INTERNAL: rdx:rax = multiplication accumulator
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;; r8-r10 = c0-c2
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;; r11-r15 = b.n[0]-b.n[4] / r3 - r7
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;; rbx = r0
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;; rcx = r1
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;; rbp = r2
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;;
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GLOBAL secp256k1_fe_mul_inner
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ALIGN 32
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secp256k1_fe_mul_inner:
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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push rdx
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mov r11,[rsi+8*0] ; preload b.n[0]
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;; step 1: mul_c2
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mov rax,[rdi+0*8] ; load a.n[0]
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mul r11 ; rdx:rax=a.n[0]*b.n[0]
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mov r12,[rsi+1*8] ; preload b.n[1]
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mov rbx,rax ; retire LO qword (r[0])
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mov r8,rdx ; save overflow
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xor r9,r9 ; overflow HO qwords
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xor r10,r10
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;; c+=a.n[0] * b.n[1] + a.n[1] * b.n[0]
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mov rax,[rdi+0*8]
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mul r12
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mov r13,[rsi+2*8] ; preload b.n[2]
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add r8,rax ; still the same :-)
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adc r9,rdx ;
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adc r10,0 ; mmm...
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mov rax,[rdi+1*8]
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mul r11
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rcx,r8 ; retire r[1]
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xor r8,r8
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;; c+=a.n[0 1 2] * b.n[2 1 0]
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mov rax,[rdi+0*8]
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mul r13
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mov r14,[rsi+3*8] ; preload b.n[3]
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rax,[rdi+1*8]
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mul r12
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rax,[rdi+2*8]
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mul r11
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rbp,r9 ; retire r[2]
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xor r9,r9
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;; c+=a.n[0 1 2 3] * b.n[3 2 1 0]
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mov rax,[rdi+0*8]
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mul r14
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,[rdi+1*8]
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mul r13
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,[rdi+2*8]
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mul r12
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,[rdi+3*8]
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mul r11
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov r11,r10 ; retire r[3]
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xor r10,r10
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;; c+=a.n[1 2 3] * b.n[3 2 1]
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mov rax,[rdi+1*8]
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mul r14
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rax,[rdi+2*8]
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mul r13
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rax,[rdi+3*8]
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mul r12
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov r12,r8 ; retire r[4]
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xor r8,r8
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;; c+=a.n[2 3] * b.n[3 2]
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mov rax,[rdi+2*8]
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mul r14
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add r9,rax ; still the same :-)
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adc r10,rdx ;
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adc r8,0 ; mmm...
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mov rax,[rdi+3*8]
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mul r13
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov r13,r9 ; retire r[5]
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xor r9,r9
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;; c+=a.n[3] * b.n[3]
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mov rax,[rdi+3*8]
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mul r14
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov r14,r10
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mov r15,r8
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;; *******************************************************
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common_exit_norm:
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mov rdi,COMP_LIMB
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mov rax,r12
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mul rdi
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add rax,rbx
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adc rcx,rdx
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pop rbx
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mov [rbx],rax
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mov rax,r13 ; get r5
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mul rdi
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add rax,rcx ; +r1
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adc rbp,rdx
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mov [rbx+1*8],rax
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mov rax,r14 ; get r6
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mul rdi
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add rax,rbp ; +r2
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adc r11,rdx
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mov [rbx+2*8],rax
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mov rax,r15 ; get r7
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mul rdi
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add rax,r11 ; +r3
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adc rdx,0
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mov [rbx+3*8],rax
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mov [rbx+4*8],rdx
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pop r15
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pop r14
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pop r13
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pop r12
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pop rbx
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pop rbp
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ret
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;; PROC ExSetSquare
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;; Register Layout:
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;; INPUT: rdi = a.n
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;; rsi = this.a
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;; INTERNAL: rdx:rax = multiplication accumulator
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;; r8-r10 = c
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;; r11-r15 = a.n[0]-a.n[4] / r3-r7
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;; rbx = r0
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;; rcx = r1
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;; rbp = r2
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GLOBAL secp256k1_fe_sqr_inner
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ALIGN 32
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secp256k1_fe_sqr_inner:
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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push rdx
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mov r11,[rdi+8*0] ; preload a.n[0]
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;; step 1: mul_c2
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mov rax,r11 ; load a.n[0]
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mul rax ; rdx:rax=a.n[0]²
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mov r12,[rdi+1*8] ; preload a.n[1]
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mov rbx,rax ; retire LO qword (r[0])
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mov r8,rdx ; save overflow
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xor r9,r9 ; overflow HO qwords
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xor r10,r10
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;; c+=2*a.n[0] * a.n[1]
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mov rax,r11 ; load a.n[0]
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mul r12 ; rdx:rax=a.n[0] * a.n[1]
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mov r13,[rdi+2*8] ; preload a.n[2]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r10,0
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add r8,rax ; still the same :-)
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adc r9,rdx ;
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adc r10,0 ; mmm...
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mov rcx,r8 ; retire r[1]
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xor r8,r8
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;; c+=2*a.n[0]*a.n[2]+a.n[1]*a.n[1]
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mov rax,r11 ; load a.n[0]
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mul r13 ; * a.n[2]
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mov r14,[rdi+3*8] ; preload a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r8,0
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rax,r12
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mul rax
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov rbp,r9
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xor r9,r9
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;; c+=2*a.n[0]*a.n[3]+2*a.n[1]*a.n[2]
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mov rax,r11 ; load a.n[0]
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mul r14 ; * a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r9,0
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov rax,r12 ; load a.n[1]
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mul r13 ; * a.n[2]
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add rax,rax
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adc rdx,rdx
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adc r9,0
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov r11,r10
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xor r10,r10
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;; c+=2*a.n[1]*a.n[3]+a.n[2]*a.n[2]
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mov rax,r12 ; load a.n[1]
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mul r14 ; * a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r10,0
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov rax,r13
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mul rax
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add r8,rax
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adc r9,rdx
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adc r10,0
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mov r12,r8
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xor r8,r8
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;; c+=2*a.n[2]*a.n[3]
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mov rax,r13 ; load a.n[2]
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mul r14 ; * a.n[3]
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add rax,rax ; rdx:rax*=2
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adc rdx,rdx
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adc r8,0
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add r9,rax
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adc r10,rdx
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adc r8,0
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mov r13,r9
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xor r13,r13
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;; c+=a.n[3]²
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mov rax,r14
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mul rax
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add r10,rax
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adc r8,rdx
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adc r9,0
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mov r14,r10
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mov r15,r8
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jmp common_exit_norm
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end
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@ -0,0 +1,11 @@
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// Copyright (c) 2013 Pieter Wuille
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// Distributed under the MIT/X11 software license, see the accompanying
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// file COPYING or http://www.opensource.org/licenses/mit-license.php.
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#ifndef _SECP256K1_FIELD_INNER5X52_IMPL_H_
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#define _SECP256K1_FIELD_INNER5X52_IMPL_H_
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void __attribute__ ((sysv_abi)) secp256k1_fe_mul_inner(const uint64_t *a, const uint64_t *b, uint64_t *r);
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void __attribute__ ((sysv_abi)) secp256k1_fe_sqr_inner(const uint64_t *a, uint64_t *r);
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||||
#endif
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Loading…
Reference in new issue